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 Kingbor Technology Co.,Ltd
TEL:(86)0755-26508846 FAX:(86)0755-26509052
kB3440 Micropower Synchronous Buck-Boost DC/DC Converter DESCRIPTION
The kB3440 is a high efficiency, fixed frequency, BuckBoost DC/DC converter that operates from input voltages above, below or equal to the output voltage. The topology incorporated in the IC provides a continuous transfer function through all operating modes, making the product ideal for single lithium-ion, multicell alkaline or NiMH applications where the output voltage is within the battery voltage range. The device includes two 0.19 N-channel MOSFET switches and two 0.22 P-channel switches. Switching frequencies up to 2MHz are programmed with an external resistor and the oscillator can be synchronized to an external clock. Quiescent current is only 40A in Burst Mode operation, maximizing battery life in portable applications. Burst Mode operation is user controlled and can be enabled by driving the MODE/SYNC pin high. If the MODE/SYNC pin has either a clock or is driven low, then fixed frequency switching is enabled. Other features include a 1A shutdown, soft-start control, thermal shutdown and current limit. The kB3440 is available in the 10-pin thermally enhanced MSOP and (3mm x 3mm) DFN packages.
FEATURES

Single Inductor Fixed Frequency Operation with Battery Voltages Above, Below or Equal to the Output Synchronous Rectification: Up to 96% Efficiency 40A Quiescent Current in Burst Mode(R) Operation Up to 600mA Continuous Output Current No Schottky Diodes Required (VOUT < 4.3V) VOUT Disconnected from VIN During Shutdown 2.5V to 5.5V Input and Output Range Programmable Oscillator Frequency from 300kHz to 2MHz Synchronizable Oscillator Burst Mode Enable Control 5 A Shutdown Current Small Thermally Enhanced 10-Pin MSOP and (3mm x 3mm) DFN Packages
APPLICATIONS

Palmtop Computers Handheld Instruments MP3 Players Digital Cameras
TYPICAL APPLICATION
Li-Ion to 3.3V at 600mA Buck-Boost Converter
L1 10H 4 SW1 SW2 kB3440 6 7 VIN VOUT 3 VIN = 2.7V TO 4.2V 8 SHDN/SS MODE/SYNC RT FB VC GND 9 C5 1.5nF 10 5 R3 15k R2 200k C2 22F
Efficiency vs VIN
100
VOUT 3.3V 600mA
VOUT = 3.3V 98 IOUT = 100mA 96 fOSC = 1MHz 94 EFFICIENCY (%)
R1 340k
92 90 88 86 84 82 80 2.5 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5
Li-Ion
+
2 C1 * 10F 1
RT 60.4k *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY
C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM L1: SUMIDA CDRH6D38-100
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kB3440
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN, VOUT Voltage........................................ - 0.3V to 6V SW1, SW2 Voltage ..................................... - 0.3V to 6V VC, RT, FB, SHDN/SS, MODE/SYNC Voltage .................................. - 0.3V to 6V
Operating Temperature Range (Note 2) .. - 40C to 85C Storage Temperature Range ................. - 65C to 125C Lead Temperature (Soldering, 10 sec).................. 300C
PACAGE/ORDER INFORMATION
TOP VIEW RT MODE/SYNC SW1 SW2 GND 1 2 3 4 5 11 10 VC 9 FB 8 SHDN/SS 7 VIN 6 VOUT
ORDER PART NUMBER kB3440EDD DD PART MARKING XXXX
TOP VIEW RT MODE/SYNC SW1 SW2 GND 1 2 3 4 5 10 9 8 7 6 VC FB SHDN/SS VIN VOUT
ORDER PART NUMBER KB3440EMS MS PART MARKING HX-AA
MS PACKAGE 10-LEAD PLASTIC MSOP
DD PACKAGE 10-LEAD (3mm x 3mm) PLASTIC DFN EXPOSED PAD (PIN 11) IS GND MUST BE SOLDERED TO PCB
JA JA
TJMAX = 125C,
JA = 43C/ W, JC = 3C/ W
TJMAX = 125C, = 130C/ W 1 LAYER BOARD = 100C/ W 4 LAYER BOARD JC = 45C/ W
denotes specifications that apply over ELECTRICAL CHARACTERISTICSThe3.6V, R = 60k, unless otherwise noted. the full operating temperature range, otherwise specifications are at T = 25C. V = V = A IN OUT T
PARAMETER Input Start-Up Voltage Input Operating Range Output Voltage Adjust Range Feedback Voltage Feedback Input Current Quiescent Current, Burst Mode Operation Quiescent Current, Shutdown Quiescent Current, Active NMOS Switch Leakage PMOS Switch Leakage NMOS Switch On Resistance PMOS Switch On Resistance Input Current Limit Maximum Duty Cycle Minimum Duty Cycle Frequency Accuracy MODE/SYNC Threshold MODE/SYNC Input Current Error Amp AVOL Error Amp Source Current Error Amp Sink Current
CONDITIONS

MIN 2.5 2.5 1.196
TYP 2.4
MAX 2.5 5.5 5.5
UNITS V V V V nA A A A A A
1.22 1 40 0.1 2800 0.1 0.1 0.19 0.22
1.244 50 50 1 4000 5 10
VFB = 1.22V VC = 0V, MODE/SYNC = 3V (Note 3) SHDN = 0V, Not Including Switch Leakage VC = 0V, MODE/SYNC = 0V (Note 3) Switches B and C Switches A and D Switches B and C Switches A and D
1 55 100 0.8 0.4 75 0 1 0.01 90 15 380 1.2 2 1
A % % % MHz V A dB A A
Boost (% Switch C On) Buck (% Switch A On)

VMODE/SYNC = 5.5V
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T
denotes specifications that apply over ELECTRICAL CHARACTERISTICS The3.6V, R = 60k, unless otherwise noted. the full operating temperature = range, otherwise specifications are at T = 25C. V = V A IN OUT
PARAMETER SHDN/SS Threshold SHDN/SS Input Current
CONDITIONS When IC is Enabled When EA is at Maximum Boost Duty Cycle VSHDN = 5.5V
MIN 0.4
TYP 1 2.2 0.01
MAX 1.5 1
UNITS V V A
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The kB3440E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating
temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: Current measurements are performed when the outputs are not switching.
TYPICAL PERFORMANCE CHARACTERISTICS
Li-Ion to 3.3V Efficiency (fOSC = 300kHz)
100 90 80 Burst Mode OPERATION
EFFICIENCY (%)
Li-Ion to 3.3V Efficiency, Power Loss (fOSC = 1MHz)
100 90 80 Burst Mode OPERATION 100
POWER LOSS (mW)
EFFICIENCY (%)
Li-Ion to 3.3V Efficiency (fOSC = 2MHz)
1000 100 90 80 70 60 50 40 30 VIN = 2.5V VIN = 4.2V VIN = 3.3V Burst Mode OPERATION
EFFICIENCY (%)
70 60 50 40 30 20 0.1 fOSC = 300kHz VIN = 2.5V
VIN = 4.2V VIN = 3.3V
70 60 50
VIN = 4.2V VIN = 2.5V VIN = 3.3V 10
VIN = 3.3V 40 30 20 0.1 fOSC = 1MHz 1 10 100 OUTPUT CURRENT (mA) 0.1 1000 1
1 10 100 OUTPUT CURRENT (mA)
1000
20 0.1
fOSC = 2MHz 1 10 100 OUTPUT CURRENT (mA) 1000
Switch Pins During Buck/Boost
Switch Pins on the Edge of Buck/Boost and Approaching Boost
Switch Pins on the Edge of Buck/Boost and Approaching Buck
SW1 2V/DIV
SW1 2V/DIV
SW1 2V/DIV
SW2 2V/DIV
SW2 2V/DIV
SW2 2V/DIV
VIN = 3.78V VOUT = 3.3V IOUT = 250mA
50ns/DIV
VIN = 3.42V VOUT = 3.3V IOUT = 250mA
50ns/DIV
VIN = 4.15V VOUT = 3.3V IOUT = 250mA
50ns/DIV
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TYPICAL PERFORMANCE CHARACTERISTICS
Switch Pins in Buck Mode
SW1 2V/DIV SW1 2V/DIV VOUT 10mV/DIV AC Coupled SW2 2V/DIV
Switch Pins in Boost Mode
VOUT Ripple During Buck, Buck/Boost and Boost Modes
Buck VIN = 5V Buck/Boost VIN = 3.78V Boost VIN = 2.5V
SW2 2V/DIV
VIN = 5V VOUT = 3.3V IOUT = 250mA
250ns/DIV
VIN = 2.5V VOUT = 3.3V IOUT = 250mA
250ns/DIV
L = 10H COUT = 22F IOUT = 250mA fOSC = 1MHz
1s/DIV
Active Quiescent Current
550 VIN = VOUT = 3.6V
Burst Mode Quiescent Current
40 VIN = VOUT = 3.6V
E/A SOURCE CURRENT (A) VIN + VOUT CURRENT (A)
Error Amp Source Current
20 VIN = VOUT = 3.6V
VIN + VOUT CURRENT (A)
500
30
15
450
20
10
400 -55
-25
5 35 65 TEMPERATURE (C)
95
125
10 -55
-25
5 35 65 TEMPERATURE (C)
95
125
5 -55
-25
5 35 65 TEMPERATURE (C)
95
125
Output Frequency
1.10 VIN = VOUT = 3.6V 0.30
NMOS RDS(ON)
VIN = VOUT = 3.6V SWITCHES B AND C
FEEDBACK VOLTAGE (V)
Feedback Voltage
1.236 VIN = VOUT = 3V
1.05
FREQUENCY (MHz)
0.25 NMOS RDS(ON) ( )
1.00
0.20
1.216
0.95
0.15
0.90 -55
-25
5 35 65 TEMPERATURE (C)
95
125
0.10 -55
-25
5 35 65 TEMPERATURE (C)
95
125
1.196 -55
-25
5 35 65 TEMPERATURE (C)
95
125
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TYPICAL PERFORMANCE CHARACTERISTICS
Feedback Voltage Line Regulation
90 VIN = VOUT = 2.5V TO 5.5V
Error Amp Sink Current
430 VIN = VOUT = 3.6V 0.30
PMOS RDS(ON)
VIN = VOUT = 3.6V SWITCHES A AND D
E/A SINK CURRENT (A)
LINE REGULATION (dB)
410 PMOS RDS(ON) ( ) -25 5 35 65 TEMPERATURE (C) 95 125
0.25
80
390
0.20
70
370
0.15
60 -55
-25
5 35 65 TEMPERATURE (C)
95
125
350 -55
0.10 -55
-25
5 35 65 TEMPERATURE (C)
95
125
Boost Max Duty Cycle
90 VIN = VOUT = 3.6V RT = 60k
2.40
Minimum Start Voltage
3000
Current Limit
VIN = VOUT = 3.6V PEAK SWITCH 2500
85
MINIMUM START VOLTAGE (V)
2.35
80
CURRENT LIMIT (A)
DUTY CYCLE (%)
2000 AVERAGE INPUT 1500
2.30
75
70 -55
-25
5 35 65 TEMPERATURE (C)
95
125
2.25 -55
-25
5 35 65 TEMPERATURE (C)
95
125
1000 -55
-25
5 35 65 TEMPERATURE (C)
95
125
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ages over 4.3V, a Schottky diode is required from SW2 to VOUT to ensure the SW pin does not exhibit excess voltage. GND (Pin 5): Signal and Power Ground for the IC. VOUT (Pin 6): Output of the Synchronous Rectifier. A filter capacitor is placed from VOUT to GND. VIN (Pin 7): Input Supply Pin. Internal VCC for the IC. A ceramic bypass capacitor as close to the VIN pin and GND (Pin 5) is required. SHDN/SS (Pin 8): Combined Soft-Start and Shutdown. Grounding this pin shuts down the IC. Tie to >1.5V to enable the IC and > 2.5V to ensure the error amp is not clamped from soft-start. An RC from the shutdown command signal to this pin will provide a soft-start function by limiting the rise time of the VC pin. FB (Pin 9): Feedback Pin. Connect resistor divider tap here. The output voltage can be adjusted from 2.5V to 5.5V. The feedback reference voltage is typically 1.22V. VC (Pin 10): Error Amp Output. A frequency compensation network is connected from this pin to the FB pin to compensate the loop. See the section "Compensating the Feedback Loop" for guidelines. Exposed Pad (Pin 11, DFN Package Only): Ground. This pin must be soldered to the PCB and electrically connected to ground.
PIN FUNCTIONS
RT (Pin 1): Timing Resistor to Program the Oscillator Frequency. The programming frequency range is 300kHz to 2MHz.
fOSC = 6 * 1010 Hz RT
MODE/SYNC (Pin 2): MODE/SYNC = External CLK : Synchronization of the internal oscillator. A clock frequency of twice the desired switching frequency and with a pulse width between 100ns and 2s is applied. The oscillator free running frequency is set slower than the desired synchronized switching frequency to guarantee sync. The oscillator RT component value required is given by:
RT = 8 * 1010 fSW
where fSW = desired synchronized switching frequency. SW1 (Pin 3): Switch Pin Where the Internal Switches A and B are Connected. Connect inductor from SW1 to SW2. An optional Schottky diode can be connected from SW1 to ground. Minimize trace length to keep EMI down. SW2 (Pin 4): Switch Pin Where the Internal Switches C and D are Connected. For applications with output volt-
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SIMPLIFIED BLOC DIAGRAM
SW1 VIN 2.5V TO 5.5V SW A 7
3
4
SW2 SW D 6 VOUT VOUT 2.5V TO 5.5V
+
SW B
ISENSE AMP
SUPPLY CURRENT LIMIT
+
2.7A
-
UVLO
+
2.4V
-
RT
RT
1
OSC SYNC SLEEP Burst Mode OPERATION CONTROL SHUTDOWN 5s DELAY 8 R2
MODE/SYNC 2 1 = Burst Mode OPERATION 0 = FIXED FREQUENCY 5 GND
-
PWM LOGIC AND OUTPUT PHASING
PWM COMPARATORS CLAMP
+
REVERSE CURRENT LIMIT ERROR AMP
- - + +
GATE DRIVERS AND ANTICROSS CONDUCTION
-0.4A SW C
+ -
1.22V R1 9 FB
10
VC
SHDN/SS
RSS VIN
CSS
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Error Amp The error amplifier is a voltage mode amplifier. The loop compensation components are configured around the amplifier to provide loop compensation for the converter. The SHDN/SS pin will clamp the error amp output, VC, to provide a soft-start function. Supply Current Limit The current limit amplifier will shut PMOS switch A off once the current exceeds 2.7A typical. The current amplifier delay to output is typically 50ns. Reverse Current Limit The reverse current limit amplifier monitors the inductor current from the output through switch D. Once a negative inductor current exceeds - 400mA typical, the IC will shut off switch D. Output Switch Control Figure 1 shows a simplified diagram of how the four internal switches are connected to the inductor, VIN, VOUT and GND. Figure 2 shows the regions of operation for the kB3440 as a function of the internal control voltage, V CI. The VCI voltage is a level shifted voltage from the output of the error amp (VC pin) (see Figure 5). The output switches are properly phased so the transfer between operation modes is continuous, filtered and transparent to the user. When VIN approaches VOUT the Buck/Boost region is reached where the conduction time of the four switch region is typically 150ns. Referring to Figures 1 and 2, the various regions of operation will now be described.
VIN 7 VOUT 6 PMOS A SW1 3 SW2 4 NMOS C VOUT PMOS D
OPERATION
The kB3440 provides high efficiency, low noise power for applications such as portable instrumentation. The Kingbor Technology allows input voltages above, below or equal to the output voltage by properly phasing the output switches. The error amp output voltage on the VC pin determines the output duty cycle of the switches. Since the VC pin is a filtered signal, it provides rejection of frequencies from well below the switching frequency. The low RDS(ON), low gate charge synchronous switches provide high frequency pulse width modulation control at high efficiency. Schottky diodes across the synchronous switch D and synchronous switch B are not required, but provide a lower drop during the break-before-make time (typically 15ns). The addition of the Schottky diodes will improve peak efficiency by typically 1% to 2% at 600kHz. High efficiency is achieved at light loads when Burst Mode operation is entered and when the IC's quiescent current is a low 25A. LOW NOISE FIXED FREQUENCY OPERATION Oscillator The frequency of operation is user programmable and is set through a resistor from the RT pin to ground where:
f=
6e10 Hz RT
An internally trimmed timing capacitor resides inside the IC. The oscillator can be synchronized with an external clock applied to the MODE/SYNC pin. A clock frequency of twice the desired switching frequency and with a pulse width between 100ns and 2s is applied. The oscillator RT component value required is given by:
RT =
8 * 1010 fSW
where fSW = desired synchronized switching frequency. For example to achieve a 1.2MHz synchronized switching frequency the applied clock frequency to the MODE/SYNC pin is set to 2.4MHz and the timing resistor, RT, is set to 66.5k (closest 1% value).
NMOS B
3440 F01
Figure 1. Simplified Diagram of Output Switches
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The input voltage, VIN, where the four switch region begins is given by:
OPERATION
75% DMAX BOOST A ON, B OFF BOOST REGION PWM CD SWITCHES DMIN BOOST DMAX BUCK FOUR SWITCH PWM BUCK/BOOST REGION V2 ( 1.55V) D ON, C OFF PWM AB SWITCHES BUCK REGION 0% DUTY CYCLE V1 ( 0.9V) INTERNAL CONTROL VOLTAGE, VCI V3 ( 1.65V) V4 ( 2.05V)
VIN =
VOUT V 1 - (150ns * f)
The point at which the four switch region ends is given by: VIN = VOUT(1 - D) = VOUT(1 - 150ns * f) V Boost Region (VIN < VOUT) Switch A is always on and switch B is always off during this mode. When the internal control voltage, VCI, is above voltage V3, switch pair CD will alternately switch to provide a boosted output voltage. This operation is typical to a synchronous boost regulator. The maximum duty cycle of the converter is limited to 75% typical and is reached when VCI is above V4. Burst Mode Operation Burst Mode operation is when the IC delivers energy to the output until it is regulated and then goes into a sleep mode where the outputs are off and the IC is consuming only 40A. In this mode the output ripple has a variable frequency component that depends upon load current. During the period where the device is delivering energy to the output, the peak current will be equal to 400mA typical and the inductor current will terminate at zero current for each cycle. In this mode the maximum average output current is given by:
3440 F02
Figure 2. Switch Control vs Internal Control Voltage, VCI
Buck Region (VIN > VOUT) Switch D is always on and switch C is always off during this mode. When the internal control voltage, VCI, is above voltage V1, output A begins to switch. During the off time of switch A, synchronous switch B turns on for the remainder of the time. Switches A and B will alternate similar to a typical synchronous buck regulator. As the control voltage increases, the duty cycle of switch A increases until the maximum duty cycle of the converter in Buck mode reaches DMAX_BUCK, given by: DMAX_BUCK = 100 - D4SW % where D4SW = duty cycle % of the four switch range. D4SW = (150ns * f) * 100 % where f = operating frequency, Hz. Beyond this point the "four switch," or Buck/Boost region is reached. Buck/Boost or Four Switch (VIN ~ VOUT) When the internal control voltage, VCI, is above voltage V2, switch pair AD remain on for duty cycle DMAX_BUCK, and the switch pair AC begins to phase in. As switch pair AC phases in, switch pair BD phases out accordingly. When the VCI voltage reaches the edge of the Buck/Boost range, at voltage V3, the AC switch pair completely phase out the BD pair, and the boost phase begins at duty cycle D4SW.
IOUT(MAX)BURST
0.1 * VIN A VOUT + VIN
Burst Mode operation is user controlled, by driving the MODE/SYNC pin high to enable and low to disable. The peak efficiency during Burst Mode operation is less than the peak efficiency during fixed frequency because the part enters full-time 4-switch mode (when servicing the output) with discontinuous inductor current as illustrated in Figures 3 and 4. During Burst Mode operation, the control loop is nonlinear and cannot utilize the control
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Burst Mode Operation to Fixed Frequency Transient Response When transitioning from Burst Mode operation to fixed frequency, the system exhibits a transient since the modes of operation have changed. For most systems this transient is acceptable, but the application may have stringent input current and/or output voltage requirements that dictate a broad-band voltage loop to minimize the transient. Lowering the DC gain of the loop will facilitate the task (10M FB to VC) at the expense of DC load regulation. Type 3 compensation is also recommended to broad band the loop and roll off past the two pole response of the LC of the converter (see Closing the Feedback Loop).
OPERATION
voltage from the error amp to determine the control mode, therefore full-time 4-switch mode is required to maintain the Buck/Boost function. The efficiency below 1mA becomes dominated primarily by the quiescent current and not the peak efficiency. The equation is given by:
Efficiency Burst
( bm) * ILOAD 25A + ILOAD
where ( bm) is typically 79% during Burst Mode operation for an ESR of the inductor of 50m . For 200m of inductor ESR, the peak efficiency ( bm) drops to 75%.
VIN 7 A 3 SW1 B dI VIN dT L L
VOUT 6 D
+
-
SW2 C
IINDUCTOR
4
400mA
0mA T1
3440 F03
5 GND
Figure 3. Inductor Charge Cycle During Burst Mode Operation
VIN 7 A 3 SW1 B dI dT V - OUT L L
VOUT 6 D IINDUCTOR 4 SW2 C 400mA
-
+
0mA T2
3440 F04
5 GND
Figure 4. Inductor Discharge Cycle During Burst Mode Operation
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A detailed diagram of this function is shown in Figure 5. The components RSS and CSS provide a slow ramping voltage on the SHDN/SS pin to provide a soft-start function.
ERROR AMP
OPERATION
SOFT-START The soft-start function is combined with shutdown. When the SHDN/SS pin is brought above typically 1V, the IC is enabled but the EA duty cycle is clamped from the VC pin.
VIN 15A
+ -
SOFT-START CLAMP VCI
1.22V FB 9 VC 10 CP1
VOUT R1
R2
TO PWM COMPARATORS
SHDN/SS 8 CSS
RSS ENABLE SIGNAL
+
CHIP ENABLE
-
1V
Figure 5. Soft-Start Circuitry
APPLICATIONS INFORMATION
COMPONENT SELECTION
1 2 L1 3 4 D1 5 MULTIPLE VIAS C2 VOUT GND RT kB3440 VC 10 FB SHDN/SS VIN VOUT 9 8 7 6 C1 R1 VIN R2
Inductor Selection The high frequency operation of the kB3440 allows the use of small surface mount inductors. The inductor current ripple is typically set to 20% to 40% of the maximum inductor current. For a given ripple the inductance terms are given as follows:
L> L> VIN(MIN)2 * VOUT - VIN(MIN) f * IOUT(MAX) * Ripple * VOUT VOUT * VIN(MAX) - VOUT
MODE/SYNC SW1 SW2 D2
(
2
) H,
H
(
)
GND
f * IOUT(MAX) * Ripple * VIN(MAX)
Figure 6. Recommended Component Placement. Traces Carrying High Current are Direct. Trace Area at FB and VC Pins are Kept Low. Lead Length to Battery Should be Kept Short
where f = operating frequency, MHz
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The output capacitance is usually many times larger in order to handle the transient response of the converter. For a rule of thumb, the ratio of the operating frequency to the unity-gain bandwidth of the converter is the amount the output capacitance will have to increase from the above calculations in order to maintain the desired transient response. The other component of ripple is due to the ESR (equivalent series resistance) of the output capacitor. Low ESR capacitors should be used to minimize output voltage ripple. For surface mount applications, Taiyo Yuden ceramic capacitors, AVX TPS series tantalum capacitors or Sanyo POSCAP are recommended. Input Capacitor Selection Since the VIN pin is the supply voltage for the IC it is recommended to place at least a 4.7F, low ESR bypass capacitor.
Table 2. Capacitor Vendor Information
SUPPLIER AVX Sanyo PHONE (803) 448-9411 (619) 661-6322 FAX (803) 448-1943 (619) 661-1055 (408) 573-4159 WEB SITE www.avxcorp.com www.sanyovideo.com www.t-yuden.com
APPLICATIONS INFORMATION
Ripple = allowable inductor current ripple (e.g., 0.2 = 20%) VIN(MIN) = minimum input voltage, V VIN(MAX) = maximum input voltage, V VOUT = output voltage, V IOUT(MAX) = maximum output load current For high efficiency, choose an inductor with a high frequency core material, such as ferrite, to reduce core loses. The inductor should have low ESR (equivalent series resistance) to reduce the I2R losses, and must be able to handle the peak inductor current without saturating. Molded chokes or chip inductors usually do not have enough core to support the peak inductor currents in the 1A to 2A region. To minimize radiated noise, use a toroid, pot core or shielded bobbin inductor. See Table 1 for suggested components and Table 2 for a list of component suppliers.
Table 1. Inductor Vendor Information
SUPPLIER Coilcraft Coiltronics Murata PHONE (847) 639-6400 (561) 241-7876 USA: (814) 237-1431 (800) 831-9172 FAX (847) 639-1469 (561) 241-9339 USA: (814) 238-0490 WEB SITE www.coilcraft.com www.coiltronics.com www.murata.com
Taiyo Yuden (408) 573-4150
Sumida
USA: www.japanlink.com/ (847) 956-0666 (847) 956-0702 sumida Japan: 81(3) 3607-5111 81(3) 3607-5144
Optional Schottky Diodes To achieve a 1%-2% efficiency improvement above 50mW, Schottky diodes can be added across synchronous switches B (SW1 to GND) and D (SW2 to VOUT). The Schottky diodes will provide a lower voltage drop during the breakbefore-make time (typically 15ns) of the NMOS to PMOS transition. General purpose diodes such as a 1N914 are not recommended due to the slow recovery times and will compromise efficiency. If desired a large Schottky diode, such as an MBRM120T3, can be used from SW2 to VOUT. A low capacitance Schottky diode is recommended from GND to SW1 such as a Phillips PMEG2010EA or equivalent.
Output Capacitor Selection The bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. The steady state ripple due to charge is given by:
%Ripple _ Boost = %Ripple _ Buck = IOUT(MAX) * VOUT - VIN(MIN) * 100 COUT * VOUT2 * f
(
)
% %
IOUT(MAX) * VIN(MAX) - VOUT * 100 COUT * VIN(MAX) * VOUT * f
(
)
where COUT = output filter capacitor, F
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Closing the Feedback Loop The kB3440 incorporates voltage mode PWM control. The control to output gain varies with operation region (Buck, Boost, Buck-Boost), but is usually no greater than 15. The output filter exhibits a double pole response is given by:
fFILTER_ POLE = 1 Hz (in Buck mode) 2 * * L * C OUT VIN Hz (in Boost mode) 2 * L * VOUT
APPLICATIONS INFORMATION
Output Voltage > 4.3V A Schottky diode from SW to VOUT is required for output voltages over 4.3V. The diode must be located as close to the pins as possible in order to reduce the peak voltage on SW2 due to the parasitic lead and trace inductance. Input Voltage > 4.5V For applications with input voltages above 4.5V which could exhibit an overload or short-circuit condition, a 2 / 1nF series snubber is required between the SW1 pin and GND. A Schottky diode such as the Phillips PMEG2010EA or equivalent from SW1 to VIN should also be added as close to the pins as possible. For the higher input voltages VIN bypassing becomes more critical, therefore, a ceramic bypass capacitor as close to the VIN and GND pins as possible is also required. Operating Frequency Selection There are several considerations in selecting the operating frequency of the converter. The first is, what are the sensitive frequency bands that cannot tolerate any spectral noise? For example, in products incorporating RF communications, the 455kHz IF frequency is sensitive to any noise, therefore switching above 600kHz is desired. Some communications have sensitivity to 1.1MHz and in that case a 2MHz converter frequency may be employed. Other considerations are the physical size of the converter and efficiency. As the operating frequency goes up, the inductor and filter capacitors go down in value and size. The trade off is in efficiency since the switching losses due to gate charge are going up proportional with frequency. Additional quiescent current due to the output switches GATE charge is given by: Buck: 500e-12 * VIN * F Boost: 250e-12 * (VIN + VOUT) * F Buck/Boost: F * (750e-12 * VIN + 250e-12 * VOUT) where F = switching frequency
fFILTER_ POLE =
where COUT is the output filter capacitor. The output filter zero is given by:
fFILTER _ ZERO =
1 2 * * RESR * COUT
Hz
where RESR is the capacitor equivalent series resistance. A troublesome feature in Boost mode is the right-half plane zero (RHP), and is given by:
fRHPZ VIN = Hz 2 * * IOUT * L * VOUT
2
The loop gain is typically rolled off before the RHP zero frequency. A simple Type I compensation network can be incorporated to stabilize the loop but at a cost of reduced bandwidth and slower transient response. To ensure proper phase margin, the loop requires to be crossed over a decade before the LC double pole. The unity-gain frequency of the error amplifier with the Type I compensation is given by: fUG = 1 Hz 2 * * R1 * CP1
Most applications demand an improved transient response to allow a smaller output filter capacitor. To achieve a higher bandwidth, Type III compensation is required. Two zeros are required to compensate for the double-pole response.
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kB3440
traces and external components. Following the recommendations for output voltage >4.3V and input voltage >4.5V will improve this condition. Additional short-circuit protection can be accomplished with some external circuitry. In an overload or short-circuit condition the kB3440 voltage loop opens and the error amp control voltage on the VC pin slams to the upper clamp level. This condition forces boost mode operation in order to attempt to provide more output voltage and the IC hits a peak switch current limit of 2.7A. When switch current limit is reached switches B and D turn on for the remainder of the cycle to reverse the volts * seconds on the inductor. Although this prevents current run away, this condition produces four switch operation producing a current foldback characteristic and the average input current drops. The IC is trimmed to guarantee greater than 1A average input current to meet the maximum load demand, but in a short-circuit or overload condition the foldback characteristic will occur producing higher peak switch currents. To minimize this affect during this condition the following circuits can be utilized. Restart Circuit For a sustained short-circuit the circuit in Figure 9 will force a soft-start condition. The only design constraint is that R2/C2 time constant must be longer than the softstart components R1/C1 to ensure start-up.
VIN
APPLICATIONS INFORMATION
1 Hz 2 * * 32 e3 * R1 * CP1 Which is extremely close to DC 1 fZERO1 = Hz 2 * * RZ * CP1 1 fZERO2 = Hz 2 * *R1 * CZ 1 fPOLE1 fPOLE2 = 1 Hz 2 * * RZ * CP 2
VOUT
+
ERROR AMP
1.22V FB 9 VC 10 CP1 R2
3440 F07
R1
-
Figure 7. Error Amplifier with Type I Compensation
VOUT
+
ERROR AMP
1.22V FB 9 VC 10 CP2
3440 F08
R1
CZ1
-
RZ
CP1
R2
R1 1M
Figure 8. Error Amplifier with Type III Compensation
SOFT-START SO/SS M2 NMOS VN2222
D1 1N4148
R2 1M
Short-Circuit Improvements The kB3440 is current limited to 2.7A peak to protect the IC from damage. At input voltages above 4.5V a current limit condition may produce undesirable voltages to the IC due to the series inductance of the package, as well as the
C1 4.7nF
C2 10nF
M1 NMOS VN2222
VOUT
3440 F09
Figure 9. Soft-Start Reset Circuitry for a Sustained Short-Circuit
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kB3440
APPLICATIONS INFORMATION
Simple Average Input Current Control A simple average current limit circuit is shown in Figure 10. Once the input current of the IC is above approximately 1A, Q1 will start sourcing current into the FB pin and lower the output voltage to maintain the average input current. Since the voltage loop is utilized to perform average current limit, the voltage control loop is maintained and the VC voltage does not slam. The averaging function of current comes from the fact that voltage loop compensation is also used with this circuit.
INPUT_VOLTAGE V1 C1 10F Q1 2N3906 FB_PIN R1 0.5 VIN_PIN
Figure 10. Simple Input Current Control Utilizing the Voltage Loop
TYPICAL APPLICATION
3-Cell to 3.3V at 600mA Converter
L1 4.7H D1 3 VIN = 2.7V TO 4.5V 7 8 SW1 SW2 kB3440 6 VIN VOUT SHDN/SS MODE/SYNC RT FB VC GND 9 10 5 C5 10pF R3 15k C4 150pF C2 22F R2 200k 4 D2 C3 33pF R1 340k R5 10k VOUT 3.3V 600mA
+
3 CELLS
2 C1 * 10F 1
RT f OSC = 1.5MHz 45.3k *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY
C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM D1, D2: CENTRAL SEMICONDUCTOR CMDSH2-3 L1: SUMIDA CDR43-4R7M
3-Cell to 3.3V Efficiency
100 90 80 70 Burst Mode OPERATION VIN = 2.7V VIN = 4.5V VIN = 3.3V
EFFICIENCY (%)
60 50 40 30 20 10
fOSC = 1.5MHz 0 0.1 1 10 100 OUTPUT CURRENT (mA)
1000
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3-Cell to 5V Boost Efficiency
VOUT 5V 300mA R1 619k C2** 22F R2 200k
TYPICAL APPLICATION
3-Cell to 5V Boost Converter with Output Disconnect
L1 10H 3 VIN = 2.7V TO 4.5V R4 1M 4 D1**
100 90 80 70 Burst Mode OPERATION
VIN = 4.5V
SW1 SW2 kB3440 6 7 VIN VOUT 8 2 C1 10F SD C3 * 0.1F 1 SHDN/SS MODE/SYNC RT FB VC GND 9 10 5 C4 1.5nF 15k
VIN = 3.6V
VIN = 2.7V
EFFICIENCY (%)
60 50 40 30 20 10 fOSC = 1MHz 0 0.1 1 10 100 OUTPUT CURRENT (mA)
+
3 CELLS
RT = 1MHz f 60.4k OSC
*1 = Burst Mode OPERATION 0 = FIXED FREQUENCY ** LOCATE COMPONENTS AS CLOSE TO IC AS POSSIBLE
C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM D1: ON SEMICONDUCTOR MBRM120T3 L1: SUMIDA CDRH4D28-100
1000
Low Profile (<1.1mm) Li-Ion to 3.3V at 200mA Converter
L1 4.7H 4 SW1 SW2 kB3440 6 7 VIN VOUT 3 VIN = 2.5V TO 4.2V 8 SHDN/SS MODE/SYNC RT FB VC GND 9 10 5 R3 15k C4 1.5nF R2 200k C2 4.7F VOUT 3.3V 200mA R1 340k
Li-Ion
+
2 C1 * 4.7F 1
RT 30.1k *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY fOSC = 2MHz
C1: TAIYO YUDEN JMK212BJ475MG C2: TAIYO YUDEN JMK212BJ475MG L1: COILCRAFT LPO1704-472M
Efficiency
100 90 80 70 Burst Mode OPERATION
EFFICIENCY (%)
60 50 40 30 20 10 0 0.1 VIN = 2.5V
VIN = 4.2V VIN = 3.3V
1 10 100 OUTPUT CURRENT (mA)
1000
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TYPICAL APPLICATION
WCDMA Power Amp Power Supply with Dynamic Voltage Control
VOUT = 3.3V - 1.7V * (VDAC - 1.22V) L1 3.3H 4 SW1 SW2 kB3440 6 7 VIN VOUT 3 VIN = 2.5V TO 4.2V 8 SHDN/SS MODE/SYNC RT FB VC GND 9 10 5 C5 10pF R3 15k C4 150pF DAC D1** C3 33pF R1 340k R5 10k R6 200k VOUT 0.4V TO 5V
EFFICIENCY (%)
100 98 96 94 92 90 88 86 84 IOUT = 600mA IOUT = 250mA
Efficiency of the WCDMA Power Amp Power Supply
VOUT = 3.4V IOUT = 100mA
Li-Ion
+
C1 * 10F
2 1
RT 30.1k fOSC = 2MHz *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY ** LOCATE COMPONENTS AS CLOSE TO IC AS POSSIBLE
R2 200k
C2** 10F
82 80 2.5 3 4 4.5 3.5 INPUT VOLTAGE (V) 5
C1, C2: TAIYO YUDEN JMK212BJ106MM D1: ON SEMICONDUCTOR MBRM120T3 L1: SUMIDA CDRH4D28-3R3
GSM Modem Powered from USB or PCMCIA with 500mA Input Current Limit
L1 10H 4 SW1 SW2 kB3440 6 7 VIN VOUT 3 VIN 2.5V TO 5.5V USB/PCMCIA POWER 500mA MAX RS 0.1 8 2 C1 * 10F 1 SHDN/SS MODE/SYNC RT FB VC GND 9 10 5 C5 10nF R5 24k C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM L1: SUMIDA CDRH-4D28-100 *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY VOUT 3.6V 2A (PULSED) R1 392k R6 130k 1N914
+
1/2 LT1490A
-
C6 TO C9 470F x4 R2 200k
RT 60.4k
-
R4 1k
1/2 LT1490A
+
2N3906 ICURRENTLIMIT = 1.22 * R4 R5 * RS
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PACAGE DESCRIPTION
DD Package 10-Lead Plastic DFN (3mm x 3mm)
R = 0.115 TYP 6 0.675 0.05
0.38 0.10 10
3.50 0.05 1.65 0.05 2.15 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 2.38 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PIN 1 TOP MARK (SEE NOTE 6)
3.00 0.10 (4 SIDES)
1.65 0.10 (2 SIDES)
(DD10) DFN 1103
5 0.200 REF 0.75 0.05 2.38 0.10 (2 SIDES)
1
0.25 0.05 0.50 BSC
0.00 - 0.05
BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE KB WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
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PACAGE DESCRIPTION
MS Package 10-Lead Plastic MSOP
0.889 0.127 (.035 .005)
5.23 (.206) MIN
3.20 - 3.45 (.126 - .136)
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6
0.497 0.076 (.0196 .003) REF
0.254 (.010) GAUGE PLANE
DETAIL "A" 0 - 6 TYP
4.90 0.152 (.193 .006)
3.00 0.102 (.118 .004) (NOTE 4)
12345 0.53 0.152 (.021 .006)
DETAIL "A" 0.18 (.007) SEATING PLANE 0.17 - 0.27 (.007 - .011) TYP 0.127 0.076 (.005 .003)
MSOP (MS) 0603
1.10 (.043) MAX
0.86 (.034) REF
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.50 (.0197) BSC
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Kingbor Technology Co.,Ltd
TEL:(86)0755-26508846 FAX:(86)0755-26509052
kB3440
TYPICAL APPLICATION
Li-Ion to 3.3V at 600mA Buck-Boost Converter
L1 10H 4 SW1 SW2 kB3440 6 7 VIN VOUT 3 VIN = 2.8V TO 4.2V 8 SHDN/SS MODE/SYNC RT FB VC GND 9 C5 300pF 10 5 R3 15k R2 200k C2 22F 220pF R1 340k
Efficiency
VOUT 3.3V 600mA
100 90 80 EFFICIENCY (%) Burst Mode OPERATION VIN = 4.2V VIN = 3.3V
2.2k
70 60 50 40 30 20 10
Li-Ion
+
2 C1 * 10F 1
RT 60.4k *1 = Burst Mode OPERATION 0 = FIXED FREQUENCY
C1: TAIYO YUDEN JMK212BJ106MG C2: TAIYO YUDEN JMK325BJ226MM L1: SUMIDA CDRH4D28-100
0 0.1
1.0 10 100 OUTPUT CURRENT (mA)
1000
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